SR Latch

Short for Set-Reset Latch. Made from cross-coupled logic gates. Can be made with NOR or NAND gates.

NOR-based SR Latch

Uses active HIGH inputs.

S	R	Change
0	0	No change
1	0	$Q$ becomes 1
0	1	$Q$ becomes 0
1	1	Invalid state

NAND-based SR Latch

Uses active LOW inputs.

S	R	Change
0	0	Invalid state
1	0	$Q$ becomes 0
0	1	$Q$ becomes 1
1	1	No change

Both types have two stable states (Q=1 or Q=0) and maintain their state until inputs change. The invalid state should be avoided as it creates an undefined output.

With enable input