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Sahithyan's S2
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Sahithyan's S2 — Computer Organization and Digital Design

Introduction to Sequential Logic

Output is determined by the current state and the input. The output is fed back to the input to determine the next output.

Generates a series of pulses at regular intervals. Used to synchronize the operation of digital circuits.

A square wave with a 50% duty cycle. The signal is high for half the period and low for the other half.

Determines when the output changes according to the clock signal.

Output changes on the rising edge of the clock signal.

Output changes on the falling edge of the clock signal.

Output changes when the clock signal is high (or low).

A table of memory, current input and output. Similar to a truth table.

A table used to determine the required inputs for a sequential circuit element to transition from its current state to a desired next state. Provides a mapping between the current state, next state, and the necessary inputs. Essential for designing and analyzing sequential circuits.

A memory element that can store a bit.

Level triggered. Independent of a clock. Asynchronous. Can change state while enabled.

Edge triggered. Dependent on a clock. Synchronous. Can change state only at rising edge of clock.

Works without a clock. Built using latches.

Works based on a clock. Built using flip flops.