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Sahithyan's S2
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Sahithyan's S2 — Computer Organization and Digital Design

Encoders & Decoders

Used to facilitate efficient data transmission by reducing the number of data lines required. Falls under medium-scale integrated (MSI) circuits group.

Converts nn input lines into mm output lines where n=2mn = 2^m.

In simple encoders, in the input lines, maximum one will be active at a time.

4-to-2 Encoder

Input lines are given a priority. When 2 or more input lines are activated, the highest priority input will take precedence. An improvement over simple encoder at the cost of extra logic. Used in interrupt controllers and as positional encoders.

Converts each digit of a decimal number into its 4-bit binary equivalent. For example, 1212 becomes 000120001_2 and 001020010_2.

Converts octal digits (each represented by 3 bits) into binary. Example: Octal 23823_8 becomes binary 010  0112010\;011_2.

Converts each hex digit (represented by 4 bits) into binary. Example: A16A_{16} becomes 101021010_2.

2-to-4 Decoder

Opposite of encoder. Have mm inputs and nn outputs where m=log2nm = \log_2{n}.

Decoders are by-default active HIGH. If made using NAND gates, then it will active LOW.

By default, the decoder require a nn-input AND gates, which is bad as nn increases. The solution is to build higher order decoders using smaller decoders.

3-to-8 Decoder using two 2-to-4 decoders

Each output in the decoder is a minterm. Using a set of OR gates, The minterms can be combined to implement any function.